Answer:
7
Explanation:
The structure of memory chip is given by multiplying the number of rows and column ie M X N
he number of address line required for row decoder is n where M =[tex] 2^{n}[/tex] or expressed in logarithmic form we have
[tex]n= log_2 M[/tex]
In this case M=N since number of rows is equal to the number of columns
Therefore, [tex]M X N= M x M= M^{2}=16 kb=16384 b= 2^{4} \times 2^{10}= 2^{14}[/tex]
[tex]M^{2}= 2^{14}[/tex]
Therefore,
M=128
Since [tex]n=log_2 M[/tex]
[tex]n=log_2 128=7[/tex]
Therefore, address lines should be at least 7