What is the impact on the pipeline when an overflow exception arises during the execution of the 'add' instruction in the given MIPS instruction sequence? Consider the sequence: 40hex sub $11, $2, $4, 44hex and $12, $2, $5, 48hex or $13, $2, $6, 4Chex add $1, $2, $1, 50hex slt $15, $6, $7, 54hex lw $16, 50($7). Assume the instructions are invoked on an exception starting at address 80000180hex with the following subsequent instructions: 80000180hex sw $26, 1000($0) and 80000184hex sw $27, 1004($0). Describe in detail the pipeline events, including the detection of overflow, the addresses forced into the program counter (PC), and the first instruction fetched when the exception occurs.
